A reconfigurable data-path accelerator based on single-flux quantum circuits
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Authors
Kataoka, H.
Honda, H.
Madipour, Farhad
Yoshikawa, N.
Fujimaki, A.
Akaike, H.
Takagi, N.
Murakami, K.J.
Honda, H.
Madipour, Farhad
Yoshikawa, N.
Fujimaki, A.
Akaike, H.
Takagi, N.
Murakami, K.J.
Author ORCID Profiles (clickable)
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Grantor
Date
2014-03
Supervisors
Type
Journal Article
Ngā Upoko Tukutuku (Māori subject headings)
Keyword
single flux quantum (SFQ)
reconfigurable data path (RDP)
accelerator
reconfigurable data path (RDP)
accelerator
ANZSRC Field of Research Code (2020)
Citation
Kataoka, H., Honda, H., Mehdipour, F., Yoshikawa, N., Fujimaki, A., Akaike, H., Takagi, N., & Murakami, K. (2014). A Reconfigurable Data-Path Accelerator Based on Single-Flux Quantum Circuits. IEICE TRANSACTIONS on Electronics, Vol.E97-C No.3, pp.141-148.
Abstract
The single-flux quantum (SFQ) is expected to be a next-generation high-speed and low-power technology in the field of logic-circuits. CMOS as the dominant technology for conventional processors cannot be replaced with SFQ technology due to the difficulty of implementing feed-back loops and conditional branches using SFQ circuits. This paper investigates the applicability of a reconfigurable data-path (RDP) accelerator based on SFW circuits. The authors introduced detailed specifications of the SFQ-RDP architecture and compare its performance and power/performance ratio with a graphics processing unit (GPU). The results show at most 1600 times greater efficiency in terms of Flops/W (floating-point operations per second /Watt) for some high-performance computing application programs
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
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Institute of Electrical and Electronics Engineers (IEEE
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Copyright © Institute of Electrical and Electronics Engineers (IEEE)